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Key Advantages of MAX® 10 Devices
Summary of MAX® 10 Device Features
MAX® 10 Device Ordering Information
MAX® 10 Device Maximum Resources
MAX® 10 Devices I/O Resources Per Package
MAX® 10 Vertical Migration Support
Logic Elements and Logic Array Blocks
Analog-to-Digital Converter
User Flash Memory
Embedded Multipliers and Digital Signal Processing Support
Embedded Memory Blocks
Clocking and PLL
FPGA General Purpose I/O
External Memory Interface
Configuration
Power Management
Revision History for the MAX® 10 FPGA Device Overview
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MAX® 10 FPGA Device Overview
MAX® 10 devices are single-chip, non-volatile low-cost programmable logic devices (PLDs) to integrate the optimal set of system components.
The highlights of the MAX® 10 devices include:
- Internally stored dual configuration flash
- User flash memory
- Instant on support
- Integrated analog-to-digital converters (ADCs)
- Single-chip Nios® II soft core processor support
MAX® 10 devices are the ideal solution for system management, I/O expansion, communication control planes, industrial, automotive, and consumer applications.
Altera expands the MAX® 10 device family with the new high I/O density packages with smaller form factor—up to 485 I/Os in 19 mm × 19 mm Variable Pitch BGA (VPBGA) packages. The VPBGA packaging is compatible with Type III PCBs that use the design rules equivalent to 0.8 mm ball pitch and standard plated through hole (PTH) vias. The VPBGA ball pitch is variable and it helps to ease signal routing. For more information, refer to the MAX® 10 FPGA Signal Integrity Design Guidelines.
Section Content
Key Advantages of MAX 10 Devices
Summary of MAX 10 Device Features
MAX 10 Device Ordering Information
MAX 10 Device Maximum Resources
MAX 10 Devices I/O Resources Per Package
MAX 10 Vertical Migration Support
Logic Elements and Logic Array Blocks
Analog-to-Digital Converter
User Flash Memory
Embedded Multipliers and Digital Signal Processing Support
Embedded Memory Blocks
Clocking and PLL
FPGA General Purpose I/O
External Memory Interface
Configuration
Power Management
Revision History for the MAX 10 FPGA Device Overview